Articles and insights about Hardware, Chips & Compute Economics.
21 articles in this category
Independent analysis from Chips and Cheese examines Intel's Lion Cove P-core architecture in gaming workloads, finding strong single-threaded performance but revealing memory latency challenges that affect real-world gaming scenarios.
Hardware engineer Andrew Zonenberg published detailed documentation of undisclosed register interfaces and configuration options in Microchip's VSC8512 12-port Gigabit Ethernet PHY, revealing capabilities hidden behind NDA-restricted documentation.
Technical analysis of Nvidia's Blackwell B200 GPU architecture reveals 208 billion transistors, 192 streaming multiprocessors, and 8 TB/s memory bandwidth, representing a significant leap in AI accelerator design.
The field-programmable gate array celebrates its 40th anniversary in 2025, marking four decades since Xilinx co-founders Ross Freeman and Bernard Vonderschmitt introduced the XC2064, the first commercially viable FPGA, in 1985.
AMD revealed details of its next-generation EPYC Venice server processors featuring up to 256 Zen 6 cores, targeting 2026 availability for data center and high-performance computing workloads.
Apple announced at WWDC 2025 that macOS Tahoe will be the final release supporting Intel-based Macs, with macOS 27 requiring Apple Silicon and Rosetta 2 translation entering a phased deprecation.
Lawrence Livermore National Laboratory's El Capitan exascale supercomputer begins integrating AI capabilities with traditional physics simulations for nuclear stockpile stewardship, marking a shift in how national laboratories approach computational science.
UC Santa Barbara's OpenTPU project, an open-source reimplementation of Google's Tensor Processing Unit architecture, resurfaces on developer forums as interest in custom AI accelerator designs continues to grow.
A VideoLAN developer submitted a merge request to optimize memory alignment in the dav1d AV1 decoder, reducing struct sizes by 264 bytes and claiming approximately 3% performance improvement for 1080p video decoding.
Lin Nan, a former head scientist at Dutch lithography equipment maker ASML, is leading research efforts at a Chinese institution working on extreme ultraviolet lithography technology, according to South China Morning Post reporting.
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